1. Field of the Invention
The present invention concerns a chip card system provided with an offset portable electronic circuit. This system can be used in the field of chip cards.
The various new uses of the chip card show that this card is destined to fulfill increasingly complex functions, if its field of application is to be extended. This entails, then, the need to use increasingly bigger surface areas of chips to be integrated into these cards in order to fulfill these functions. This is the case, for example, with two known applications of chip cards, namely the telephone card and the bank card. The chip of the telephone card is a simple memory. It takes up a surface area of the order of one mm.sup.2. The chip of a bank card is a processor that integrates memory. It takes up a surface area of the order of 20 mm.sup.2. This is so for a given state of the art in semiconductor integration. It is indeed well known that ongoing progress is being made in the field of semiconductor integration. This means that for one and the same integrated circuit size, it will become possible to integrate increasingly more functions.
It may briefly be recalled that a chip card is a relatively slim plastic card, wherein a semiconductor chip and a grid of conductors are inset in the thickness of the card. The chip is mounted on an upper surface of the grid, for example by bonding. Conductive wires are then soldered, firstly, to output terminals of the chip and, secondly, to metallizations of the grid. This is the chip card mounting technology known as the chip on board technology. A lower surface of the grid is flush with one of the two surfaces of the card, and forms the connector of the chip card. When this card is inserted into the reader, it is to this connector that the reader gets connected.
Standard readers, such as those of public telephones and banking systems, have imposed a standardization of chip cards. We can distinguish, firstly, a standardization of the card itself, as an object. This standardization of the shape and thickness has been dictated by the prior existence and use of magnetic cards, with the aim of using readers of already existing magnetic cards. Then, we can distinguish a standardization of the connector, related to the shape, number and connection system pitch of the contact zones of the connector and also related to the assigning of a determined signal to each contact zone, in accordance with a communications protocol. Finally, we can distinguish a standardization of the relative position of the connector on the card. A French standardization provides a position of the connector in a corner of the card. A German standardization provides a position of the connector in the middle.
The standardization of the connector dictates, in particular, a determined distribution of the contact zones of the connector which necessitate a use of non-extensible free surface area. This surface area restricts the possible surface area of the chip that is to be mounted on the this connector with the chip on board technology. Indeed, the width of the chip should be entirely included in that taken up by the connector.
In addition to this first technological limitation on the area of the card capable of integration into a chip card, there is a second one. Indeed, the standard support of the chip card is ill-suited to a chip with a large surface area. While the support is flexible, the chip for its part is very rigid. The bigger the chip, the more sensitive it is to strains and the greater are the chances of its being damaged. In practice, the effect of this is to reduce the reliability of the chip card, when it integrates a big chip. This is not tolerable in certain applications of the chip card, notably banking applications.
2. Description of the Prior Art
Various known techniques have been used to resolve this problem. It has been attempted, notably, to reduce the extent of the strains on the chip and the wires that connect it to its grid of connectors. We might cite, for example, the known use of a slab of cobalt placed beneath the substrate of the chip to rigidify the chip. In another example, the method for making a cavity so that the chip can be received in the card is modified in order to make rigid the chip environment. However, in this chip card mounting technology, these approaches do not enable mounting on large surfaces, with areas of more than 20 mm.sup.2 for example. And, for surface areas such as this, numerous problems arise, notably the problem of the reliability of the chip thus mounted.
Besides, the plastic material that forms the card is not impervious to the various forms of ion and organic pollution to which the chips of the integrated circuit are very sensitive. The deterioration in reliability that is caused is all the more aggravated as the chip size increases. This is a third technological limitation.
Finally, the mounting technology used is of the hybrid type. It is not optimized in terms of production. Indeed, semiconductor mounting technology uses a standard line for making a product in very large quantities. This product consists of one or more chips mounted in a standard package and called an electronic component. Beside these electronic components produced in large quantities, we therefore have a specific product, for example the chip mounted on a conductor grid for the chip card. This specific product is produced in far smaller quantities. But it too requires a specific production line. This considerably increases the production costs and depreciation costs of this line, as compared with those of production lines for standard products. Furthermore, the reject rate of this specific product is far higher than that of standard products because of the technology used. Indeed, the fixing of the wires is a delicate operation, the reliability of which directly affects the final product. These wires require specific protection to ensure that they do not deteriorate. To circumvent these difficulties, it has also been attempted, in what is called "tape automatic bonding"technology, to connect metallizations lead ends of the grid, particularly by hot transfer process, to the terminals of the chip. However, this technology also suffers from the degree of manufacturing precision that it requires. It too does not lead to sufficient reliability of mounting.